Programmable chip design programs altera. Hardware - ALTERA: programmable logic chips (introductory material). altera products. altera, one of the largest PLS developers, was founded in 1983 as

(C) Research/VolgaSoft Modern technologies. ALTERA.(introductory material) INTRODUCTION This article will talk about a modern little miracle, a calculated breakthrough in the world of digital electronics - programmable logic chips. This is the brick that stands in the most modern models ZX-SPECTRUM - GMX and SPRINTER , this is the same microcircuit on which you can do almost everything - from Z80X (let's say, 30 MHz, machine cycle 1 clock), to everything Pentagon together with a 2D accelerator, GS, mouse and IDE controller. Probably every radio amateur, when developing a digital device, dreamed in his heart - where to find a pill for all diseases - a microcircuit that would replace everything. Engineers especially needed such devices, since when developing a serious product they had to design a custom integrated circuit “for the task.” From the moment the logic was drawn up until the working product appeared, several months usually passed and a huge amount of resources was spent. But demand creates supply - semi-custom large-scale integrated circuits (LSI) and programmable logic arrays (PLA) have appeared. Science did not stand still, technologies became more and more advanced, and one day the release of a package “software” + “hardware” + “stone” was announced. The idea was very simple: the developer draws a diagram in the software (maybe transfers it from paper), or describes the logic of the future product with binary equations and simple operators, then the compiler translates the diagram into some code, and the code is stitched up by a programmer (“hardware”). ") into a programmable logic chip ("stone"), which can be immediately soldered into the board. And there are no costs for chip development or testing. Developers of digital devices embraced the new product with a bang. Today there are a lot of manufacturers of LSI programmable logic (PL) on the market. Their products differ both in capacity and architecture, as well as in the quality of software and hardware support, service and, ultimately, cost. The clear leader today is the company Altera Corporation . It conquered the market thanks not only to its wide range of products, but also to the competent distribution of its products. For example, the use of software products (student versions) for educational purposes is free. For Russia, in general, it is not important (almost no one has ever seen the copyright law), but abroad this issue is relevant. In addition, the company’s products literally broke into the domestic market - as a result, we are now almost all on it. FROM WORDS TO ACTION VLSI PL from Altera classified according to the following criteria: 1) degree of integration (number of available gates (2I-NOT elements) and flip-flops); 2) architecture of the simplest functional converter (cell); 3) organization of the internal structure of VLSI and the structure of the matrix of connections of functional converters (method of connecting cells); 4) the presence of internal RAM memory; 5) technology for manufacturing a programmable element (Fuse, EPROM, EEPROM, FLASH, SRAM) - how the circuit is wired. To work with most of its BIS PL company Altera offers the MAX+plus II hardware description language. The MAX+plus II design automation system supports six families of VLSI PL.┌─────────┬──────────────────────┐ │ │ Parameters │ │ ├────────── ┬─────┬─────┤ │Family│Logic│UPin │Tech │ │ │ capacity │ │ │ │ │ │ │ │ ├─── ──────┼────── ────┼─────┼─────┤ │Classic │ 300-900 │22-64│EPROM│ │MAX5000 │ 600-3750 │24-84│EPRO M│ │MAX7000E │ 600-5000 │ up to 164│EEP- │ │MAX9000 │ 6e3-12e3 │up to 216│ROM │ │FLEX8000A│ 2500-16e3│up to 208│SRAM │ │FLEX10K │ 1e4-1e5 │up to 406 │SRAM │ └─────────┴─ ─────────┴─────┴─────┘Logical capacity is the number of available 2I-NOT elements, that is, up to 25,000 of our LA3s can fit into the FLEX10K. UPin - number of user pins. Tech - technology. Practical explanation for the table: let’s say we take the deadest FLEX8000A (SRAM technology - i.e., after turning on the power, the circuit of the device must be “poured” into the alternator), hang it with the user’s feet on the Rodimigo bus Speccy (there will be a few free ones left), we make a simple port decoder in bulk and connect it to the alterina input. What do we get? We get a super device!!! After all, now you can pour virtually any scheme into an alter!!! It could be anything from an external mat. processor (let’s say we put a 16-bit number byte-by-byte into one port, the second number into another, the operation code somewhere else, then read the result), to everything that is comprehensible to the mind (if you poke a few free legs “where should" - you can make hardware fill and hardware construction of segments, multi-channel programmable interrupts (especially relevant for digital audio), new processor commands (as in"sprinter" or additional processor registers....). You can create libraries of hardware functions so as not to invent big ones, as stubborn “coders” still do, and read them in accordance with the task. The “firmware” of the circuit of the same FLEX8282A (“the deadliest”, see above) weighs, if my memory serves me correctly, 6kB. During configuration, all user legs are in the Z-state and do not affect the operation of the system. If you need to make a device “to last forever” and not configure it every time after turning it on, you can use the MAX family. Also, some LSIs of the MAX family have protection against “circuit leakage” - a bit of development secrecy, however, in my opinion, the use of this family is somewhat limited (at least in “home” conditions) due to the need for programmer and a limited number of programming cycles.NOW A FEW WORDS ABOUT THE DEVELOPMENT ENVIRONMENT: HARDWARE DESCRIPTION LANGUAGE MAX + PLUS II.The MAX + plus II system is written for the following platforms: PC, MAC, SUN. Neither Speccy , for some reason, not even the notorious girlfriend was on this list. The system is very good, simple and with wide possibilities. The main components are graphic and text editors, a compiler, a diagram editor (also known as a “debugger”), a timer, and a layout and layout editor. A diagram of the device is drawn in the graphic editor (if a graphic task is used). As elements of the scheme, you can use the logic “according to the bourgeois guest”, the entire 74th series is there, and if you don’t like the enemy’s designations, you can draw everything in our way and make it work. A text editor is used to provide a text description of the hardware. The language is somewhere between dBase, C, Pascal . There is almost a ready-made command for describing a synchronous finite state machine, there is also if and case . The adder is described literally as C=A+B . A telephone chip card is described and tested (see below) in an hour without straining. The compiler checks the schematic (or text) and generates firmware for the given “brick”. Widely adjustable optimization limits for speed and volume allow you to squeeze out the maximum performance from the device or the minimum occupied area on the chip. There is a useful thing designed by doctor. Shows where there are races and dangerous places, and under what conditions they will appear, does not forget to ask to press reset to initialize the device after turning it on, etc. In the diagram editor, you can simulate the operation of the future device: let’s say you set the input signals and look at the corresponding outputs; the races don’t forget to be displayed either. Therefore, before assembling the circuit, it is better to run it in “max” and check it. True, there was also a bug - the T-trigger made of R.S. , synchronized by the difference, although in practice it plowed. Viewing diagrams is made very convenient: you can view diagrams by combining them into groups and presenting an easy-to-view number system (binary, decimal, hexadecimal). Input data can also be specified by code Gray . You can also view the internal states of the machine. The timer - it is also a timer in Africa - shows delays and the maximum possible operating frequency of the device. The layout and layout editor is used for “hardware” removal of races (rearrangement of logic cells) and placement of custom pins. Distributor price Altera Unfortunately, I lost it, so I can only say from memory that FLEX10K10 costs from $20, FLEX8282A from $8, elements of the MAX family cost from $3.3. If you are interested in where you can get information, you can scroll to the end of the article, because further information will follow.MORE INFORMATION ABOUT FAMILIES The Classic family includes 3 series of VLSI. LSIs of this family make it possible to replace a device containing from 10 to 20 microcircuits of medium degree of integration, and provide: * signal propagation delay from any input and output of the LSI no more than 10 ns; * stable operation at frequencies up to 100 MHz; * ability to work in low power consumption mode; * the ability to set the development secrecy mode (the circuit cannot be merged back from the mikruhi). Note: it looks like they have already been discontinued. The MAX5000 family includes 5 series of VLSI. LSIs of this family make it possible to replace a device containing up to several dozen microcircuits with an average degree of integration, and provide: * a delay in signal propagation from any input and output of the LSI of no more than 15 ns; * stable operation at frequencies up to 76 MHz; * ability to set development secrecy mode; * the ability to use three operating modes of output buffers: input, output, bidirectional. The MAX7000 family includes 7 series of VLSI. LSIs of this family make it possible to replace a device containing up to hundreds of microcircuits with a medium degree of integration, and provide: * signal propagation delay from any input to the output of the LSI no more than 5 ns; * stable operation at frequencies up to 178 MHz; * ability to regulate the speed of switching output buffers; * possibility of using 4 operating modes of output buffers: input, output, bidirectional, open collector; * the ability to set a low-power consumption mode both for the entire VLSI as a whole and for the propagation circuits of individual signals; * possibility of programming and reprogramming after wiring on the board; * ability to set development secrecy mode; * work with reduced (3.3 V) supply voltage. Note: a number of series comply with the PCI bus standard. The FLEX8000A family includes 7 series of VLSI. LSIs of this family make it possible to replace a device that occupies dozens of boards made on microcircuits with a medium degree of integration, and provide the ability to: * stable operation at frequencies up to 294 MHz; * emulation of an internal bus with 3 states; * work with reduced (3.3 V) supply voltage; * work in systems with mixed (3.3 V, 5 V) supply voltage; * implementation of an unlimited number of configuration cycles, including “on the fly”, i.e. without turning off the VLSI power supply; * regulation of the switching speed of output buffers; * possibility of using 3 operating modes of output buffers: input, output, bidirectional. Note: all VLSIs in this series comply with the PCI bus standard. The MAX9000 family includes 4 series of chips. LSIs of this family make it possible to replace a device that occupies dozens of boards made on microcircuits with a medium degree of integration and provide the ability to: * stable operation at frequencies up to 125 MHz; * independent use of the logical part and trigger of the macrocell; * the ability to set a low-power consumption mode both for the entire VLSI as a whole and for the propagation circuits of individual signals; * possibility of programming and reprogramming after wiring on the board; * work in systems with mixed (3.3 V, 5 V) supply voltage; * regulation of the switching speed of output buffers; * use of 3 operating modes of output buffers: input, output, bidirectional. Note: a number of series comply with the PCI bus standard. The FLEX10K family includes 7 series of VLSI. LSIs of this family make it possible to replace a device that occupies hundreds of boards made on microcircuits with a medium degree of integration, and provide the ability to: * stable operation at frequencies up to 450 MHz; * on-chip implementation of static memory and ROM with a capacity of up to 24 Kbit; * independent use of the logical part and trigger of each logical element; * emulation of an internal bus with 3 states; * multiplying the internal clock frequency; * work in systems with mixed (3.3 V, 5 V) supply voltage; * implementation of an unlimited number of configuration cycles, including “on the fly”, i.e. without turning off the VLSI power supply; * regulation of the switching speed of output buffers; * possibility of using 4 operating modes of output buffers: input, output, bidirectional, open collector. Note: all VLSIs in this series comply with the PCI bus standard. That's it. I’ll only add that progress does not stand still and more series have been added to each family. APPEARANCES WWW.ALTERA.COM - there you can get more detailed information and electronic keys to the MAX + Plus II program (pretending to be a student or researcher).EFO company. Email: [email protected] Tel. (812) 247-5340 194021 St. Petersburg, Politekhnicheskaya st., 21(here you can buy the corresponding elements).LITERATURE 1. Review of the ALTERA element base (Antonov A.P., Melekhin V.F., Fillipov A.S.; St. Petersburg 1997) 2. The same book (only it seems larger) is on the compact with MAX + Plus II in video.PDF (apparently 45 MB), although in English.

ALTERA programmable logic integrated circuits and MAX+PLUS II computer-aided design system

Programmable logic integrated circuits (FPGAs), or in foreign literature referred to as PLDs (programmable logic devices), are semi-custom digital LSIs, which, thanks to their architectural and technological features, can be developed and manufactured without specialized technical equipment. FPGAs appeared on the world market in the mid-80s. And they immediately became widespread, moving the process of creating a specialized LSI from the factory to the designer’s workplace. The LSI development cycle has been reduced to several hours, and the associated costs have been significantly reduced.

Since the beginning of the 90s. The greatest demand is for FPGAs that have:

high logic integration based on CMOS technologies;

speed up to 80 -100 MHz and higher;

Possibility of programming (loading internal configuration) without a programmer.

All these requirements are met by FPGAs from ALTERA (USA), a world leader in the field of FPGAs. Currently, ALTERA produces seven families of FPGAs of various architectures [14].

In Russia, the most famous FPGAs are the Classic family, produced for some time by INTEL. The main advantages of these microcircuits are simplicity, low cost, easy-to-install DIP packages, micro-energy consumption in static mode and the ability to be supported by domestic means (CAD FORS+, Blitz, Sterkh, Forsys programmers). FPGA EP220 replaces any 1556 series microcircuit (HP4, HP6, HP8, XL8).

All FPGAs are manufactured using ultraviolet eraseable CMOS (EPROM) technology, which provides the following power consumption parameters:

in static mode - 10-30 µA;

at a frequency of 1 MHz - 2-8 mA;

with increasing clock frequency - 1 mA/MHz.

To reduce the price by 30-40% during mass production of products, all FPGAs are also produced in plastic packages (DIP and PLCC) with one-time programming.

The disadvantages of FPGAs of the classic family are the relatively low degree of integration and some architectural features: the lack of input for triggers to be set to “1” (SET), blocking of contacts when implementing internal memory elements.

FPGAs of the MAX7000 and FLASHlogic families, which have a matrix architecture, i.e. contain programmable matrices of logical gates “AND”, “OR” and flip-flops.

The MAX7000 family consists of seven chips with integration levels ranging from 1,200 to 10,000 equivalent logic gates, containing from 32 (EPM7032) to 256 (EPM 7256) flip-flops.

Additionally, FPGA EPM7032V is produced - a functional analogue of the EPM7032 microcircuit with a supply voltage of 3.3 V.

The MAX7000 family of FPGAs are manufactured using electrically erasable CMOS (EEPROM) technology. They provide:

minimum signal propagation delay from input to output 5 ns;

maximum clock frequency 190 MHz;

up to 100 programming/erase cycles.

The MAX7000 family of FPGAs have a flexible architecture. Their macrocells contain two independent feedback lines; from the trigger and from the contact. This allows the flip-flop to be used as an internal register and the pin to be used as an input port at the same time. Additional resources of the FPGA are expansion terms - conjunctors, the inverse outputs of which form feedback connections with the matrix of “AND” elements. Terms allow you to generate control signals (for example, CLK, SET, RESET) without spending macrocells. As a result of the redistribution of terms between macrocells, the number of inputs of the “OR” elements can be increased to 32.

Each macrocell has an individual turbo bit, the programming of which allows you to reduce power consumption with a slight decrease in performance. Beginning in 1996, all MAX7000 family FPGAs will be available in the ISP (in system programmable) variant. This will allow you to program and erase the circuit directly on the working board through the 4th signal interface connected to the computer port. The presence of a programmer becomes optional, which greatly simplifies and reduces the cost of using FPGAs.

The MAX7000 family of FPGAs are low cost. For example, the price of the EPM7032 chip is less than 7, and the EPM7128 chip is less than 25.

With the advent of the MAX7000 family, the practical value of the previously produced FPGAs of the MAX5000 family has significantly decreased, because analogues of all microcircuits have appeared (for example, EPM5128 - EPM7128) with better performance characteristics and power consumption at lower prices.

MAX+PLUS II is an automated programmable logic integrated circuit (FPGA) design system developed by Altera Corporation, a global leader in FPGA manufacturing.

MAX+PLUS II is a multifunctional software product that provides the designer with the ability to completely design an FPGA, from entering the circuit that the designer intends to implement on the FPGA and ending with programming the FPGA itself on the programmer.

MAX+PLUS II offers the following user options:

input of the internal structure of the FPGA by graphical input of the functional diagram;

input of the internal structure of the FPGA using the high-level programming language Altera Hardware Description Language (AHDL), which is completely built into the MAX+PLUS II shell;

modeling of FPGA operation in the form of timing diagrams;

If you have a programmer, write the designed structure to the FPGA, etc.

When describing the internal structure of an FPGA using AHDL, several options are possible.

In the first option, describe the structure in primitives, i.e. using simple functions such as RS-trigger, D-trigger, T-trigger, JK-trigger, etc.

In the second option, carry out the description using primitives and mega-functions.

Mega functions are complex logical functions such as counter, multiplexer, decoder, register, etc.

The advantage of the first option is that the translator spends less time converting the simplest functions of the AHDL language into machine codes.

The disadvantages of this option are the large volume of program text and the need for a detailed description of the entire system.

In the second option, when using mega-functions, there is no need for a detailed description of the elements in the sense that the programmer sets only the parameters of a complex logical function. For example, using the lpm_counter mega-function, a counter can be described by specifying only the clocked input and the width of the counter itself. This significantly reduces the volume occupied by the program text, and also allows you to slightly reduce the time it takes to write a program.

The disadvantage is that it takes more time to translate the program into machine codes compared to the first option.

But in the end the result is the same, so the style of writing a software product depends entirely on the designer.

When debugging a written software product, SIMULATOR MAX+PLUS II allows you to examine in detail the result of the FPGA operation in the form of timing diagrams. The designer can select various outputs and intermediate states described in the program, as well as specify various input actions.

INTRODUCTION

Usually, when someone sees a functioning board, they always ask the same questions: - Is this an Arduino? - How does it work without Arduino?

It's not a microcontroller, it's not even a processor, it's an FPGA. FPGA is a programmable logic integrated circuit, such a microcircuit consists of many identical blocks or macrocells, each manufacturer calls them differently, so for Xilinx it’s Slices (slices) for Altera - LogicElements (logical elements). These blocks are relatively simple, they can act as several logical elements, be a small lookup table (LUT), contain a ready-made adder, multiplier, digital signal processing (DSP) block, in general, everything that the manufacturer has in mind. The user can arrange and configure these blocks as he wishes, thus implementing quite complex digital circuits. You can implement even a microcontroller on an FPGA, for example implementing the same Arduino or a processor of your own architecture, for example, not a register processor but a stack processor, you can even implement your own FPGA on an FPGA!

Among the available budget FPGAs, two main manufacturers can be identified: Altera and Xilinx; with their products you can begin your journey of mastering these technologies. In my opinion, it is better to choose Altera chips, since their design environment is constantly updated, and if you choose one popular Xilinx XC3S500E chip, you will have to be content with the outdated ISE 14.7 environment (although it also has its advantages).

In foreign literature you can find abbreviations for FPGAs: FPGA and CPLD. CPLD (Complex Programmable Logic Device) - chips with a small number of macrocells, specialized blocks and low power consumption. A large project cannot be synthesized for this type of chip, but they are also used in practice, for example, a rare microcontroller has, say, 300 legs. Such chips are often used as interface systems, preprocessors, and I/O expanders. FPGA (Field-Programmable Gate Array) is a field-programmable gate array (FPGA), much more powerful chips compared to CPLD, but consumes more power and costs significantly more. To reduce the cost of die area, FPGA chips can contain ready-made functions, such as digital signal processing units (DSP units), embedded processors, and embedded memory. FPGAs are widely used for testing and verifying designs, in so-called pre-silicon validation, thereby reducing costs and time before product release. FPGA chips can be reconfigured at almost any time; developments are currently underway, for example at Intel, to combine the architectures of a conventional processor and an FPGA chip. Xilinx already has such solutions - Zynq, but we will not talk about them for now.

We will talk about simpler things, especially since I got my hands on a development kit: Cyclone IV 4 FPGA Core Board and Altera USB Blaster Downloader PLD Development kit for $35, purchased on AliExpress.

1 Demo board Cyclone IV 4 FPGA Core Board, brief description

Rice. 1 - Demo payment Cyclone IV 4 FPGA Core Board

The board (Fig. 1) has an EP4CE6E22C8N chip installed, its characteristics:

Resource type	Short description	Quantity
Logic elements (Les)	The number of logical blocks - cells, the main characteristic by which we can compare the “power” of chips; any synthesized logic will use these blocks	6,272
Embedded memory (Kbits)	Built-in memory is not yet an important characteristic for us	270
Embedded 18x18 multipliers	Built-in hardware multipliers, a very important parameter in digital signal processing, the full power of FPGAs is revealed when several multipliers operate in parallel	15
General-purpose PLLs	Phase-locked loop nodes, not yet an important characteristic, simplify the synchronization of devices operating at different frequencies	2
Global Clock Networks	The number of frequency domains is not yet an important characteristic	10
User I/O Banks	The number of separate user I/O banks is not yet an important characteristic	8
Maximum user I/O	Number of custom I/O pins, we can connect any devices, such as Arduino	91

The board has:

1. Flash Memory – When power is applied, the FPGA will be configured to be implemented in flash memory. You can synthesize your project and write into this flash
2. 25 MHz quartz is a reference clock frequency generator, it is at this frequency that all our projects will operate, our FPGA can support up to 10 such channels.
3. LEDs – 10, buttons – 2.
4. I/O pins 61 + 2 ground, 1 not connected. You can connect a variety of devices. DAC-ADC, accelerometers and gyroscopes, character and graphic displays, like Arduino.
5. Power supply via USB, or external 5V.

The kit also includes a JTAG programmer, Altera USB Blaster.

2. Quartus II environment and our first project

To work with this FPGA we need to download the official development environment - Quartus II Web Edition, it's free. We go to the official website http://dl.altera.com/15.0/?edition=web, at the time of writing version 15.0 is the newest, if it is newer, download it.

Choose:

Rice. 2 - select the necessary Altera products

And click the download button (Download Selected Files). After which we will be asked to register, register, download and install.

Let's create our first project.

Launch Quartus, select the main menu File -> New Project Wizard, the introduction window appears, click next. Next you need to specify the directory for the project and its name, the third field is the name of the top module, you will see later what it is. We select the folder where we want to save the project and come up with a name, I have test1.

Rice. 3 - new project wizard window

Click next, we are asked whether it is an empty project or a Project template. Leave empty, next. Then we are asked to add existing files, we have nothing, since we are just starting our journey, click next.

Next, we need to select our chip; this can be done at any time. We select as in the figure, Family – Cyclone IV E, specific device selected in “Available devices” and select our EP4CE6E22C8N chip, it is at the very beginning. If you have another, find yours, it is important. Click next.

Rice. 4 -

A window will appear - selecting design tools, debugging, skip this for now, click next and then finish.

Rice. 5 - Window “Assinments-Deice”

In the window, select the “Unused pins” item. This setting determines what happens to unconnected pins. This may be important; in your project you are unlikely to use all the pins, and the unconnected ones may in fact be connected to ground or power (well, you never know who wired the board). If you apply a one to a grounded pin, it will burn out, so you need to carefully monitor this.

By default, the unused pins “As input tri-stated with weak pull-up” (input pins are in the third state with high impedance, with a weak power pull-up), you can leave or select “As input tri-stated”. You can read about the pull-up resistor on Wikipedia https://ru.wikipedia.org/wiki/Pull-up_resistor. In digital technology there can be three states, a logical one is the supply voltage or a high level, a logical zero is when the pin is connected to ground or a low level and high impedance state. High impedance condition- this is when a pin has a very high resistance and practically does not affect the wire to which it is connected; this state is necessary, for example, when organizing buses, when many devices are connected to one wire and inactive devices do not interfere with operation.

Rice. 6 - “Device and Pin Options” window, Unused Pins

We connect it all in the “Assignment Editor”

Rice. 7 - Call “Assignment Editor” from menu or panel

In the window that appears, do it as I did, or, if absolutely correct, then according to the diagram of your board.

Rice. 8 - Assinement Editor

In the “To” column, enter the name of the input or output. In the “Assignment Name” column, select “Location”. In the “Value” column there is the pin number of the microcircuit, according to the board diagram (I have pin numbers written directly on the board).

You also need to specify what to do with the buttons, which are connected with one leg to the ground and the other to the input of the chip. When you press on the leg there will be a low level, but without pressing, it’s unclear, the chip’s leg will just hang in the air, which is very bad. You need to connect the chip input to power either with a resistor on the board or in a more elegant way in the “Assignments Editor”. In the “Assignment Name” column, select “Weak Pull Up resistor” for the key* group (the group is indicated by an asterisk).

Rice. 9 - Assignment Editor

Next, you need to create a description of the top-level module, which will work directly with the chip legs; all other modules will work only with it. In the main menu, click New, and select "Design Files-> Block Diagram/Schematic File".

Rice. 10 - New files dialog

In the window that opens, select the “Pin Tool” and place the input and output (input and output pins) on the diagram. We rename the input as key, the output as led and connect them with a conductor. Save and click "Start Compilation".

Rice. 11 - Graphic description window, Pin Tool and Start Compilation highlighted

After compilation, we got warnings, we ignore them for now, they relate to unconnected pins, missing clock signal and description for “Timing Analyzer”.

We connect the demo board and programmer, select the “Programmer” tool. The window should say “USB-Blaster”, if not, then click “Hardware Setup” and try to figure out why not, most likely the drivers are not installed, look at Windows devices, look for unidentified devices, maybe there is a problem with the cable. If everything is fine, click “Auto Detect” and select our chip.

Rice. 12 - Programmer Window

Double-click in the “File” field and select the file to write to the FPGA (located in the output_files folder of our project), check the “Program / Configure” field, and click the “Start” button.

Rice. 13 - Programmer window, our chip is already configured

Congratulations on your first FPGA configuration! Diode D1 should light up, when you press key1 it should go out (since the button closes the leg to ground), then we will do something about it)

For most radio amateurs and designers involved in their own developments, digital microcircuits have long been known and mastered. Many people have been designing their designs on microcontrollers for quite a long time since this significantly reduces the dimensions and improves the functionality of the devices. The only problem is that not everything can be built on the basis of a controller. High-speed devices that require an instant response to changing input signals cannot be built on a microcontroller, since it organizes step-by-step (pipeline) processing of commands, as a result of which a decision is made to issue a particular signal. Therefore, along with microcontrollers, it is necessary to use conventional logic, sometimes with a decent number of packages. The consequence of this is a large number of external connections, design complexity and large dimensions of printed circuit boards, large lengths of connecting conductors, difficulty in constructing devices with high clock frequencies, and low reliability. The solution to this problem is the use of programmable logic integrated circuits (FPGAs), which are a collection of a certain number of functional basic elements that do not have hard electrical connections to each other, which allows you to set an almost arbitrary configuration in order to create a particular electronic circuit. At the first stage, FPGAs were microcircuits with fused jumpers such as K556RT4-RT5 and others. It was possible to create some functions on them, but it was not possible to cram a small circuit with counters and triggers.

The stages of designing devices based on simple logic are poorly automated and in case of an error it is necessary to modify the board to introduce additional elements. Studying the MAX+plus II BASELINE software package and FPGA from Altera will not only simplify the circuit but also avoid many pitfalls. This software can also be used when designing circuits on the 155 series and its analogues. For programming (creating connections) in PLD (as well as

CPLD) EPROM, EEPROM and FLASH technologies are used. For radio amateurs, FLASH microcircuits are of greatest interest since they allow you to reprogram the crystal about 100 times and, after removing the supply voltage, retain the structure established as a result of programming.

This article will discuss the issues of step-by-step development of circuits based on FPGA from Altera - EPM3064A as the cheapest. It is housed in a 44-pin PLCC package. The microcircuit has mixed power supply and a multivoltage input/output (I/O) interface. Supply voltage of the logical core is 3.3 volts, input/output elements – 5; 3.3; and 2.5 volts. Maximum clock frequency 227.3 MHz depending on modification. By setting the configuration bits it is possible to control the slope of the edges ( SlewRate) input/output signals. There is also an implementation of open drain outputs by setting the bit ( OpenDrain). It is possible to set an energy saving mode that reduces power consumption by more than 50%. It is also possible to set the privacy bit ( securitybit) which will not allow you to copy the internal configuration of the chip. This microcircuit has 4 blocks of logical matrices and 64 macrocells. Programmable macrocell triggers have individual clock inputs ( clock), sync permissions ( clockenable), reset ( clear), and presets ( preset). Each macrocell can be considered as a programmable matrix AND and fixed matrix OR. At the matrix output OR A register with a configurable control circuit is included. The register control circuitry provides independently programmable clock, clock enable, reset, and preset signals. According to the author, 10-15 155 series cases can be stuffed into this microcircuit (EPM3256 microcircuits with 16 logic matrix blocks and 158 pins are available for sale).

The EPM3064A architecture includes the following elements: Logic blocks ( LABs). Macrocells ( Macrocells). Logic expanders, shared ( Shareable) and parallel ( Parallel). Programmable connection matrix ( PIA). I/O Control Units ( I/Ocontrolblocks). The chip has four specialized inputs ( dedicatedpin) which can be used as general purpose inputs or high-speed global control inputs (sync - clock, zeroing clear and two output permission signals - enable), for each macrocell and I/O pin. The block diagram is shown in Fig.1.

FIG 1

The core architecture of the EPM 3064A is logical blocks, consisting of 16 macrocells. Logic blocks are connected together using a programmable connection matrix ( PIA). The following signals are supplied to each logical block: 36 signals from PIA, used as logic inputs. Global control signals. Direct circuits from input buffers to registers, providing high performance. You can read more about the functional composition and operating principle of the microcircuit in.

FIGURE 2

To program the chip, you need to make a special download cable ByteBlasterMV Fig2. It allows you to quickly and efficiently change the FPGA configuration both at the project testing stage and during operation. Reprogramming can be done directly in the system. While programming is in progress, the pins of the microcircuit are transferred to the third state to avoid conflict with the system. The resistance of the internal pull-up resistors is 50 kOhm.

This download cable can be used for programming microcircuits of the MAX 3000A, MAX 7000, MAX 9000 series and many others, you can read more in. The download cable diagram is shown in Fig. 3. Connector X1 is connected directly to the parallel port of the computer or through an extension cable, and its length should not exceed 1.5 meters. Power for the programmer is taken directly from the circuitry of the device being designed. For normal operation of the programmer, you must install the driver ByteBlasterMV which will be described below. It is advisable to use the original D 1 chip since it can operate in the supply voltage range from 2.5 to 5 volts (in extreme cases, it can be replaced with 1564AP5). All resistors are MLT 0.125 type. Capacitor C1 is ceramic.

FIGURE 3

Printed circuit board Fig4. made from single-sided foil fiberglass 1.5mm thick and 52x43mm in size.

FIGURE 4

To create a project in the environment of the MAX+PLUS II system from ALTERA, you need to download from the Internet and install Fig5. freely redistributable file baseline10_1.exe The link to the site is given in . After installing the program for full functionality, you must go to the Altera website and obtain a license file. On this page select the link MAX+PLUS II software for students & universities. On the next page select the link Version 10.2, 10.1,or 9.23 and press the button continue. On the next page in the window, enter your hard drive registration number. To do this in Windows, press the button START then Programs, Accessories, command line, and dial the command dir And enter.

FIG 5

The second line will print the 8-digit disk serial number. This is what needs to be entered. Next press the button continue and fill out the form on the next page. When you finish filling out the form, click the button continue. The license file will be sent to you by mail. Create a folder c:\mp2student\ and place the file sent to you there license.dat. To install the license file, run MAX+plusII 10.1 BASELINE then click the tab Options And LicenseSetup in the window that appears, click the button Browse, and specify the path to the license file. Click the button OK. After this, all applications will become available. After this, you need to install the programmer driver file. To do this, press the button START then Setup, control panel, equipment installationFurther then the button Dah, the device is already connected and a button Further. In the next window select Adding a new device And Dalley. Install the button on Installing equipment selected from the list manually And Dalley. Select from the list Sound, video and gaming devices And Dalley. Press the button Uinstall from disk, then button Review. Setting the path C:\maxplus2\Drivers\win2000 if you have WindowsXP installed then click OK. Select from the list Altera ByteBlaster, button Further And Ready.

The MAX+PLUS II system has tools for convenient project input, compilation and debugging, as well as direct device programming. The MAX+PLUS II system software contains 11 applications and a main control program. The various applications that support project creation can be activated instantly, allowing the user to switch between them with a mouse click or menu commands. At the same time, one of the background applications can be running, for example, a compiler, simulator, synchronization analyzer and programmer.

The table describes the applications.

Table

Application	Function performed
HierarchyDisplay	Hierarchy overview— displays the current hierarchical file structure in the form of a tree with branches representing subprojects.
GraphicEditor	Graphics editor— allows you to develop a circuit logic project in the format of a real display on the screen.
SymbolEditor	Character editor— allows you to edit existing symbols and create new ones.
TextEditor	Text editor— allows you to create and edit logical design text files written in AHDL, VHDL, Verilog HDL.
WaveformEditor	Signal editor— performs a dual function: a tool for design development and a tool for entering test vectors and observing test results.
FloorplanEditor	Level-by-levelscheduler— allows you to make assignments to device contacts and logical element resources using graphical means.
Compiler	Compiler— processes graphic projects.
Simulator	Simulator— allows you to test logical operations and internal synchronization of the designed logical circuit.
TimingAnalyzer	Time analyzer— analyzes the operation of the designed logic circuit after it has been synthesized and optimized by the compiler.
Programmer	Programmer— allows you to program, configure, verify and test ALTERA FPGAs.
MessageProcessor	Message generator— displays error, warning and informational messages on the screen.

Let's create a working directory in which we will place our project C:\ALTERA_WORK\schetchic. The circuit can be described in AHDL, VHDL, Verilog HDL (for those who prefer programming) or graphically (more suitable for radio amateurs). A project file is a graphic, text or signal file created using the graphic or signal editors of the MAX+PLUS II system. This file contains the logic for the MAX+PLUS II project and is compiled by the compiler. The compiler can automatically process the following project files: graphical project files ( .gdf); project text files in AHDL language ( .tdf); project signal files ( .wdf); project files in VHDL language ( .vhd); project files in Verilog language ( .v); OrCAD schematic files ( .sch); EDIF input files ( edf); format files XilinxNetlist (.xnf); project files Altera (.adf); digital machine files ( .smf). Auxiliary files are files that are associated with the MAX+PLUS II project, but are not part of its hierarchical tree. Most of these files do not contain project logic. Some of them are created automatically by the MAX+PLUS II system application, others by the user. Examples of support files are assignment and configuration files ( .acf), symbol files ( .sym), report files ( .rpt) and test vector files ( .vec).

So in the main menu click File then New and select the item Graphic Editor file And OK fig6. A graphic editor window will open. Next, let's save our project under the name schetchic. gdf to our catalog C:\ALTERA_WORK\ to do this, click File then Save As And OK. Let's bind the file name to the project file; for this, in the main menu, click File then Project and onwards Set Project to Current File or instead you can press the keys simultaneously Ctrl+ Shift+ J. Let's set the type of microcircuit that will be used in the project. To do this, press the button in the main menu Assign then Device.

In the window that appears, in the line Device Family select a series MAX3000 A. And in the window Devices EPM3064ALC44-4 and OK. If you don’t know how much space your project will take, then Devices better install AUTO, the compiler itself will select the type of microcircuit.

FIG 6

The working library contains elements of various types:

1). Logical primitives (located in the c:\maxplus2\max2lib\prim\ folder) elements such as and, or, nor etc. with different numbers of inputs.

2). Analogues of discrete logic of the 74th series are analogues of the 155th series (located in the folder c:\maxplus2\max2lib\mf\).

3). Parameterized logical functions that allow you to create projects of digital devices of any complexity (located in the c:\maxplus2\max2lib\mega_lpm\ folder).

Let's create a directory in which we will place our own library of components C:\ALTERA_WORK\Altera_Lib and connect it to the project. To do this, press the button in the main menu Options then UserLibraries and out the window DirectoryName let's enter the path c:\altera_work\altera_lib then OK. There are two ways to place a symbol on the screen; to do this, right-click on the place where we want to place the element and select the menu in the window that appears Enter Symbol in the window SymbolName in the window that appears, type the name of the element and click OK. Or select the required library in the window SymbolLibraries dialog box EnterSymbol and double-click the left mouse button to open it. Then select the required element in the window in the same way SymbolFile. If the project is small and you are satisfied with all the elements in the library, then in this way we install all the necessary elements and connect their pins using conductors. To do this, in the graphic editor on the left there are icons, when you click on them, you can get a straight line connection, lines placed at right angles, sectors and circles. If the line is highlighted in red, then you can put the connection address on it and not make the connection itself. Input and output circuits are drawn by selecting them from the library of elements input And output( if necessary, we assign them a name). To plot a logical one and zero, type vcc or gnd. And if you need your own symbol, then you need to open a new window of the graphic editor and draw a diagram of the component Fig7, give it a name and save it in the library c:\altera_work\altera_lib. Link to the project file and compile by clicking ctrl+L. If there are no errors, then you can check the operation of the circuit using a simulator.

FIG 7

To do this we open Waveform Editor, save the file under the same name. On the first line under Name: right-click and select menu EnternodesfromSNF in the window that appears, click the button List in the window AvailableNodes &Groups all the inputs and outputs of our circuit will appear. We select the necessary ones (in this case IN And OUT) And press the button => the selected characters will be copied in the right window. Click OK. In the editor you can see the oscillogram Fig.8. Under the name Value Can set the initial state of the input signal; for this, click the left mouse button on the line on the left, the icons of logical 1 and 0 are displayed in the editor, by clicking the icon we assign the input status. You can enter a time-varying signal or Z state. The end time of the oscillogram can be entered by going to the menu File then EndTime. Timestamps are set via menu Options then Grig Size.

To view the state of the oscillogram over time, run Simulator pressing buttons Ctrl+Shift+L. The oscillogram can be seen in Fig.9. If we are satisfied with the resulting component model, we will draw an image of the symbol. To do this, open the symbol editor, in the main menu click File then New and select the item SymbolEditor file And OK fig6. By clicking the left mouse button, we draw the outline of the symbol by first selecting the drawing tool on the left in the icon.

Double click the left mouse button open the menu EnterPinstub on the left in the window we indicate output type input or output I/ OType. In the window FullPinstub Name Specify the output name (in our case IN— entrance OUT— exit). The sizes of all lines and labels can be changed and moved by left-clicking on the element being moved. The file must be saved under the same name as the graphic editor file in our library folder.

Having closed all auxiliary windows, we can enter a symbol into our project file.

Let's consider the practical circuit of a three-digit counter with dynamic indication Fig.10. The power supply is assembled on a D 2 chip of type LM 317 and provides the voltage necessary for D 1.

FIG 10

The output current of the indicator discharges can be about 80 mA with all indicators turned on, therefore the indicator discharges are switched by transistors VT 1-VT 3. For the experimental model, an internal generator circuit was selected, the external circuits of which are resistors R 16, R 18, C 2, but in In the working scheme, it is better to make the generator external. According to the author, FPGAs do not work very well with capacitive loads. Connector X1 is required for connection to the programmer.

Let's consider the internal structure of the project Fig.11. All components were created anew using the above method and saved in their own component library.

FIG 11

Components on the diagram 0_3r_commutator– this is a three-digit switch that switches the indicator digits in turn and also issues control levels to multiplexers 0_3 and_ or. Multiplexers connect decimal counters depending on the displayed digit 0_2 b_10 d_ counter To binary — seven-segment decoder 0_ bcd _7 seg . The names of the components contain a preposition 0 _ which we denote an element of our own library. On the diagram in the MAX+PLUS II project, double-clicking the left mouse button on the component will open the graphic editor and we will see the diagram of the element. Figure 12 shows a switch whose circuit consists of standard library primitives. Name NOT – means inverter, DFF – D trigger, AND2 – element AND with two entrances. Figure 13 shows the internal diagram binary decimal counter. Figure 14 shows a multiplexer. And rice 15 binary — seven-segment decoder. Below is a list of some of the standard library's megafunctions.

FIG 12

FIG 13

FIGURE 14

Logic gates (Gates):

lpm_and – AND element

lpm_inv – NOT element (inverter)

lpm_bustri – tri-state bus

lpm_mux - multiplexer

lpm_clshift - logical shift

lpm_or – OR element

lpm_constant - constant

lpm_xor – Exclusive OR element

lpm_decode - decoder

mux – multiplexer

busmux - multiplexer

FIGURE 15

Arithmetic components:

divide* — divisor

lpm_compare - comparator

lpm_abs – absolute value

lpm_counter - counter

lpm_add_sub – adder/subtractor

lpm_divide — divisor

lpm_mult — multiplier

Memory elements:

altdpram* - dual-port RAM

lpm_latch – latch register

lpm_shiftreg – shift register

dcfifo* — Dual-Clock FIFO

lpm_ram_dp - dual-port RAM

scfifo* — Single-Clock FIFO

lpm_ram_dq – RAM with separate input and output ports

csdpram - Cycle-Shared Dual-Port

lpm_ram_io - RAM with a common input and output port

lpm_ff — Trigger

lpm_rom - ROM

lpm_fifo — Single-Clock FIFO

lpm_dff* — D – flip-flop and shift register

lpm_fifo_dc — Dual-Clock FIFO

lpm_tff* – T-trigger

Other features:

clklock - PLL (Phase-Locked Loop)

pll – pulse edge detector

ntsc – NTSC video signal generator

After all the components have been created, the general diagram of the project has been drawn and all connections have been made, you need to save the project and compile. If there are no errors, you must go to Waveform Editor and how it was considered Above, make sure that the project is working correctly Fig.16.

FIGURE 16

The circuit routed by the compiler automatically assigns input and output pins; this can be seen in Floorplan Editor by pressing the button. In the same editor, you can change the purpose of the legs as you wish. To do this, click the button and drag the names of the pins displayed in the window with the mouse UnassignedNodes & Pins, to the corresponding FPGA pin numbers, and then recompile the project. After this, any changes made to the internal structure of the project, i.e. not related to adding or removing pins will not change the pin assignment.

After this, we connect the Fig10 circuit through connector X1 to the programmer, and the programmer to the computer (we do all these procedures with the computer turned off) and supply power to the circuit. Opening the window Programmer and press the button Program. After the program is loaded, the circuit will switch to operating mode. This method allows you to change the internal circuit of the device depending on changing tasks without altering the printed circuit board.

Despite the apparent complexity of learning the MAX+PLUS II software environment, you will be able to make projects much faster, since designing and debugging on a computer provides more information than making a circuit on a breadboard and further research using an oscilloscope. As noted earlier, the results obtained can be successfully used in the manufacture of structures based on the 155-555 series.

Were you waiting for a sign? Here he is!

For many years I was hesitant to start programming FPGAs because it was difficult, expensive and painful (as it seemed to me). But it’s good to have friends who help you take the first step. And now I don't understand one thing - WHY DID I WAIT SO LONG?

Now I will help you take the first step too!

Why do I need it?

Are you tired of constantly reading documents on your MK or holding a bunch of information in your head. You rewrote everything in asm, but the speed is still not enough. You connected two external devices to your MK, you connect a third, but you have run out of interrupts, those modules that were already working stop working. You take another MK, a more powerful one from the same line, but again manuals, flag registers, bits... hell. You change the platform: you switch to another MK and throw away your knowledge of the previous platform. No matter what you do, it is hard. You find a popular platform in which you can easily assemble a project from components, but you still can’t jump above the hardware limitations of this MK... Somewhere on the edge of your consciousness sometimes the thought pops up that on an FPGA this would definitely work quickly and in parallel, what is this “exactly the problem that needs to be solved please”, but I’m too old/stupid/busy/etc to be able to/start doing this.

Do you want to finally breathe freely? Go ahead!

The joy of developing on FPGAs

I had a hard day at work. From one job I came to the second job, then to the dacha, in the evening I did homework, homework, then a family movie, and only at 11 pm I was completely free! To say that I was tired is to say nothing. But in this state, I sat down at the laptop with a firm goal: to make a 440 Hz square wave generator. 20 minutes passed and I could already hear it in my headphones. I couldn't believe my ears! It took me another 15 minutes to make PWM and change the volume. By that time, I had only had the FPGA board for about a week, and before that I had only read a couple of books on Verilog.

That evening I realized: HERE IT IS! This is the platform where I can quickly and easily turn my thoughts into actually working hardware!

Why is that?

I will describe the advantages that there are in studying and using FPGAs, although everyone already knows them:

• Universality of knowledge- when changing the MK model, you need to read the documentation. When changing the manufacturer of the MK, you need to read the documentation. You need to constantly read the docs, constantly keep a lot of information in your head. When developing on an FPGA, if you know Verilog or VHDL, then you can not only program any FPGA from the line of one manufacturer, but also, if you wish, switch to another (Altera, Xilinx). Although there will be moments when mastering a different development environment and subtle hardware issues, the very essence of the approach to designing devices in HDL will not change from this.
• From idea to hardware- when developing a project, if you lack one microcontroller, you have to choose another. In principle, you can make assumptions about whether this MK will cope or not cope with the project. Or there is a specific MK and you are trying to fit a project into it. Most often this is the case. It reminds me a little of my grandfather’s approach, who makes a ladder out of what he has in the shed. Although you can design a staircase, buy boards that will fit... From idea to hardware, and not vice versa.
• Ease of use of other people's developments- you can take someone else's module and apply it in your project. You can understand from the code how it works. Even if it is for xilinx, and you are doing it under altera. Sometimes this doesn't work out well, but it's easier than, for example, adding binary libraries to a C++/Qt project
• Block independence. Blocks in HDL are like pure functions in language. Depend only on input signals. The developed and debugged module will continue to work correctly, no matter how the project grows. Nothing from the outside will affect the correct operation of it from the inside. And in general, you can forget how it works - it's a black box. Plus, the blocks work parallel.

Problem of choice

There are a lot of questions about what to choose: Altera/Xilinx, Verilog/VHDL, what debug board to take. But first things first.

Manufacturer

I chose Altera. Why? Well, this is how my friend and I decided, although the name Xilinx is more beautiful to me. BUT. If you cannot choose now, then I will do it for you. You need Altera! Why? I don't know. The more important thing now is to take a step: to make a choice. I chose Altera and have no regrets so far.

Language

Let's take it Verilog - because… Well, you understand.

Development board

Choosing the development board took the most time. It is clear that the boards differ in the installed FPGA chip. And FPGA chips differ from each other in the number of elements. But it’s not at all clear how many of them will be needed for your test projects. Therefore, I spent most of my time searching for all sorts of FPGA projects to find out how much they consume FPGA resources.

In the Altera family, for reasonable money we can buy boards with CPLD MAX II with 240, 570 and 1270 elements, or older FPGA chips such as Cyclone 1, 2, 3, 4 with up to 10,000 or more cells. How to choose?

Even on the basis of 240 cells, the Mars Rover project does just a huge number of projects. I strongly recommend that you read it to get a rough idea of ​​the complexity of projects that can fit into 240 cells. On the other hand, there are projects that are completely programmed for a hardware copy of a specific PC, including the processor and all the logic around it (NES, Speccy, Orion, YuT-88, etc). This already requires five, ten or more thousand cells. Plus, these boards contain additional external devices.

Therefore, I would advise taking something between 240 and 10,000 cells, with a preference for larger ones depending on the available funds. On a debug board, extra cells are not a big deal, but if there aren’t enough of them, there’s nothing you can do about it. Then, when the device is debugged, it will become clear how many cells are needed, buy the required quantity, without unnecessary “body kit”, cheaper and leave it in the finished device.

What really differentiates MAX from Cyclones, besides the number of cells, is:
1) The MAX series does not have a PLL inside. Each development board has an oscillator, usually 50 MHz. This will be enough for the majority of projects. All synchronization will occur by dividing 50 MHz by some value. Or, you can take an external generator and feed it to a separate FPGA input. What if you need a frequency higher than 50 MHz? I was unable to immediately find oscillators above 50 MHz. But this is where PLL, which is built into Cyclones, comes to the rescue. On it you can multiply the frequency, for example, up to 100 MHz.
2) The Cyclone series has built-in hardware multiplication units. Their number depends on the specific model - here you can still “look at the instructions” to find out how much. If you plan to do some kind of DSP, then they will come in handy: they will save cells and increase speed. On the other hand, if there are no multipliers, they can be synthesized, but a small FPGA may not have enough resources for this.

In all other respects, I have a “fit/not fit” criterion. Debugging on a board that is obviously larger than needed, followed by filling it with the minimum required for this.

How much money is needed?

Programmer
I believe that I do not have time to solder programmers in bulk.

300 rubles. I got mine on eBay, it looks like this:

Development board
The choice is wide, depending on the amount of money.

First level 350 - 550 rubles. These are boards based on MAX II (or cells). May be suitable for initial familiarization and further integration into end devices. The board has a generator, a couple of buttons, a couple of LEDs, and the remaining 80 pins at your discretion.

power unit
It's a must have, but it's not always included. You will need a 5 volt power supply and a current of 2A.

Average level from 900 to 1500 rubles. These are Cyclone 1, 2, 3, 4 boards, differing mainly in the number of cells.
They are marked something like this:
E.P. 2 C 5 T144 - Cyclone 2 approximately 5k cells
E.P. 4 C.E. 6 E22C8N - Cyclone 4 approximately 6k cells
E.P. 2 C 8 Q208C8N - Cyclone 2 approximately 8k cells

You may notice that Cyclone 3 may have more cells than Cyclone 4.

Here are some options:

835 rubles.
ALTERA FPGA CycloneII EP2C5T144 Minimum System Board for Learn good

880 rubles
Altera CycloneII EP2C5T144 FPGA Mini Development Learn Core Board E081

1265 rubles
EP2C8 EP2C8Q208C8N ALTERA Cyclone II FPGA Evaluation Development Core Board

Advanced boards . These are boards on which additional modules (UTP, USB, AUDIO), connectors (SD, VGA), buttons, switches, LEDs, seven-segment indicators, etc. are installed. Or there may be a base board, and expansion boards may be attached to it separately.

I have the following set working - board + expansion board:
Altrea EP4CE10E22 FPGA CORE Board+ Device Board USB/Sound/Ethernet/SD Card/VGA
2760 rubles

Here is the main board. It has 2 LEDs, 2 buttons, 4 switches, a seven-segment indicator and a RAM chip.

Expansion board. It contains SD, VGA, as well as USB controllers (High Speed ​​USB2.0 Chip: CY7C68013A), AUDIO (Sound Card up to 96kHz/32bit ADC/DAC: WM8731S), UTP (100M Ethernet interface: DM9000A):

These boards are simply inserted into one another, but I still have it in a drawer. For my crafts, I have a breadboard, which I connect to with a cable that comes with the kit. A 5 volt power supply is also included.